---
id: "CVE-2026-98551"
kind: "vulnerability"
aliases: ["CVE-2026-98551"]
title: "Linux kernel perf: arm64 branch stack can leak uninitialised kernel memory"
severity: "unknown"
cvss: null
epss: null
exploited: false
status: "open"
category: "other"
products: []
ecosystems: []
tags: ["arm64", "linux-kernel", "other", "perf"]
not_affected_if: ["non-arm64-hardware", "perf-restricted-to-root", "x86-64"]
published_at: "2026-10-18T16:17:07+00:00"
first_seen_at: "2026-10-23T21:57:15+00:00"
updated_at: "2026-10-25T05:23:33+00:00"
sources: [{"source": "nvd", "url": "https://nvd.nist.gov/vuln/detail/CVE-2026-98551", "first_seen_at": "2026-10-23T21:57:15+00:00"}]
---

# Linux kernel perf: arm64 branch stack can leak uninitialised kernel memory

On arm64, the perf subsystem fills branch-stack records without clearing two fields, so some records sent to userspace hold leftover kernel heap data. An attacker with access to perf sampling could read that residual memory.

_Summary, check and fix written by a model from the sources; labelled as such._

## How to check

- `uname -r` and compare against the kernel version that carries the upstream fix (unknown from sources)
- Check whether the host is arm64 with BRBE hardware: `uname -m` returns `aarch64`
- Check whether perf branch-stack sampling is allowed for unprivileged users: `cat /proc/sys/kernel/perf_event_paranoid`

## Fix

- Update the Linux kernel to a release that includes the upstream commit "perf/core: Fill branch entries with a single assignment" (fixed version unknown from sources)
- Restrict perf access on shared arm64 hosts until patched, for example with `sysctl -w kernel.perf_event_paranoid=3`

## Timeline

- 2026-10-23T21:57:15+00:00 nvd https://nvd.nist.gov/vuln/detail/CVE-2026-98551

## From the sources

In the Linux kernel, the following vulnerability has been resolved:

perf/core: Fill branch entries with a single assignment

perf_clear_branch_entry_bitfields() clears the bitfields of struct
perf_branch_entry one by one and leaves from/to alone, since callers
overwrite those straight away. The list has to be kept in sync with the
struct by hand and has already fallen behind: new_type and priv were
added to perf_branch_entry and never added here.

Only BRBE writes those two, and neither for every record.
brbe_set_perf_entry_type() leaves new_type alone for a branch type it
does not recognise, and priv is not set for source-only records.
arm_pmuv3.c allocates the per-CPU branch stack with kmalloc(), so such a
record reaches userspace with whatever the slot held: uninitialised
kmalloc() data on the first pass over the buffer, the previous record's
values after that. Nothing under arch/x86/events/ writes either field,
so only arm64 is affected.

Assign the whole entry at each site instead. Everything not named is
then zero, and there is no list to keep in sync. The bitfields add up to
exactly 64 bits, so the struct has no padding to leave undefined.

perf_clear_branch_entry_bitfields() has no callers left, so remove it.
perf_entry_from_brbe_regset() assigns an empty literal instead, since it
fills from/to conditionally. PERF_BR_SPEC_NA is 0, so dropping the
explicit spec assignment changes nothing.

---

_Free to read at a human pace. An API with keys and an MCP server are in preparation; early access: hello@infrastack.ai_