---
id: "CVE-2026-79979"
kind: "vulnerability"
aliases: ["CVE-2026-79979"]
title: "Zephyr arm64: stale TLB entries let user threads read and write evicted memory"
severity: "high"
cvss: 7.8
epss: 0.00144
exploited: false
status: "open"
category: "runtime"
products: []
ecosystems: []
tags: ["arm64", "embedded", "rtos", "runtime", "zephyr"]
not_affected_if: ["default-config", "no-demand-paging", "non-arm64"]
published_at: "2026-10-23T20:17:27+00:00"
first_seen_at: "2026-10-23T21:57:34+00:00"
updated_at: "2026-10-25T12:38:49+00:00"
sources: [{"source": "nvd", "url": "https://nvd.nist.gov/vuln/detail/CVE-2026-79979", "first_seen_at": "2026-10-23T21:57:34+00:00"}, {"source": "epss", "url": "https://api.first.org/data/v1/epss?cve=CVE-2026-79979", "first_seen_at": "2026-10-25T12:38:49+00:00"}]
---

# Zephyr arm64: stale TLB entries let user threads read and write evicted memory

On arm64 builds with user mode and demand paging, the MMU invalidates TLB entries using the wrong ASID, so a user thread keeps access to a physical frame after the kernel evicts and reuses it. A user-mode thread can then read or write supervisor data, another memory domain's partition, or another thread's stack.

_Summary, check and fix written by a model from the sources; labelled as such._

## How to check

- Check whether the build has both `CONFIG_USERSPACE` and `CONFIG_DEMAND_PAGING` enabled in the kernel configuration (`.config` or `prj.conf`) for an arm64 target
- Check whether a backing store is active and whether any demand-paged page is privately mapped into a user memory domain
- Check the Zephyr version in use against the fixed release (unknown)

## Fix

- Update Zephyr to a release that includes the commit switching `invalidate_tlb_page()` to `TLBI VAAE1{IS}` (fixed version: unknown in sources)
- Until updated, disable `CONFIG_DEMAND_PAGING` on arm64 builds that use user mode (workaround implied by the exploitation conditions)

## Timeline

- 2026-10-23T21:57:34+00:00 nvd https://nvd.nist.gov/vuln/detail/CVE-2026-79979
- 2026-10-25T12:38:49+00:00 epss https://api.first.org/data/v1/epss?cve=CVE-2026-79979

## From the sources

The arm64 MMU backend invalidates a single virtual address from the TLB with invalidate_tlb_page() in arch/arm64/core/mmu.c, which issued TLBI VAE1{IS} with an operand of virt >> 12. That operand encodes the ASID in bits [63:48], so the invalidation only ever matched ASID 0 (the kernel page tables) and global entries. Memory domains, however, are allocated ASIDs starting at 1 in arch_mem_domain_init(), and every domain-private leaf created by private_map() is mapped with MT_NG, i.e. non-global. A domain's cached translation therefore survived the invalidation.

All callers of invalidate_tlb_page() are demand-paging paths. When the eviction algorithm reclaims a frame, page_frame_prepare_locked() in kernel/mmu.c calls arch_mem_page_out(), which marks the kernel leaf invalid, propagates the invalid descriptor into every domain via sync_domains(), and then flushes only ASID 0. do_page_fault() immediately reuses the very same page frame for the incoming mapping through arch_mem_page_in(). A user thread that had already touched the evicted page — a k_mem_partition added with arch_mem_domain_partition_add(), or its own stack mapped by map_thread_stack() — retains a valid EL0 read/write translation to that physical frame under its own ASID.

Unprivileged code running in a user thread can drive memory pressure to force eviction and then keep accessing the stale address, obtaining read and write access to whatever the kernel subsequently placed in that frame: supervisor data, another memory domain's partition, or another thread's stack. This defeats the isolation that CONFIG_USERSPACE is meant to enforce, allowing information disclosure and memory corruption up to full compromise of the system.

The fix switches the implementation to TLBI VAAE1{IS}, which matches every ASID and both global and non-global entries, so no domain-tagged translation survives a page out, dirty-bit update or access-flag clear. Exploitation requires an arm64 build with both CONFIG_USERSPACE and CONFIG_DEMAND_PAGING enabled, an active backing store, and at least one demand-paged page that is also privately mapped into a user memory domain. The same commit additionally stops globalize_table() from stripping EL0 permission and non-global attributes off domain-private leaves during paging synchronization, which previously caused user threads to lose access to their own partitions and stacks.

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_Free to read at a human pace. An API with keys and an MCP server are in preparation; early access: hello@infrastack.ai_