CVE-2026-0455 · Infrastructure
NO FIX YET
The Peripheral Protection Unit on the Versal AI Edge Series Gen 2 system-on-chip fails to block unauthorized access to inter-processor interrupt buffer registers. Any processor on the chip with an IPI channel can read and write the entire IPI buffer and no-buffer control register space.
first public Nov 12, 2026 · 1 source
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Affects Versal AI Edge Series Gen 2 system-on-chip designs where multiple processors share the chip and rely on XPPU to isolate IPI registers. Teams running standard boards without custom firmware on separate processor domains are unlikely to be exposed, but the sources do not say which configurations are affected.
Not affected if single-processor-domain
Who cares amd, embedded, fpga, soc, versal
Unknown from the sources.
No fix yet, per the sources.
The Versal™ AI Edge Series Gen 2 Peripheral Protection Unit (XPPU) for the inter-processor interrupt (IPI) buffers does not block unauthorized access as expected. This allows processors in the SoC with any IPI channel access the ability to both read and write to the entire IPI buffer register space as well as the IPI no-buffer register control space.
This page as .md · .json · CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:A/VC:L/VI:L/VA:H/SC:L/SI:L/SA:H/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
NVD data is provided by NIST and is public domain. Posts quoted belong to their authors.
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